Data Group

Control Name / Readback Name

Linac Timing

ITS:CTRTrigCoarseDelayM                  / ITS:CTRTrigCoarseDelayM ITS:CTRTrigDelayM                        / ITS:CTRTrigDelayM ITS:CTRTrigFineDelayM                    / ITS:CTRTrigFineDelayM ITS:CTRTrigGateM                         / ITS:CTRTrigGateM ITS:CTRTrigMaskM                         / ITS:CTRTrigMaskM ITS:CTRTrigWidthM                        / ITS:CTRTrigWidthM ITS:DU1:Trig4CoarseDelayM                / ITS:DU1:Trig4CoarseDelayM ITS:DU1:Trig4DelayM                      / ITS:DU1:Trig4DelayM ITS:DU1:Trig4FineDelayM                  / ITS:DU1:Trig4FineDelayM ITS:DU1:Trig4GateM                       / ITS:DU1:Trig4GateM ITS:DU1:Trig4MaskM                       / ITS:DU1:Trig4MaskM ITS:DU1:Trig4WidthM                      / ITS:DU1:Trig4WidthM ITS:ICTTrigCoarseDelayM                  / ITS:ICTTrigCoarseDelayM ITS:ICTTrigDelayM                        / ITS:ICTTrigDelayM ITS:ICTTrigFineDelayM                    / ITS:ICTTrigFineDelayM ITS:ICTTrigGateM                         / ITS:ICTTrigGateM ITS:ICTTrigMaskM                         / ITS:ICTTrigMaskM ITS:ICTTrigWidthM                        / ITS:ICTTrigWidthM ITS:RefTrig:sourceM                      / ITS:RefTrig:sourceM ITS:RefTrigCoarseDelayM                  / ITS:RefTrigCoarseDelayM ITS:RefTrigDelayM                        / ITS:RefTrigDelayM ITS:RefTrigFineDelayM                    / ITS:RefTrigFineDelayM ITS:RefTrigGateM                         / ITS:RefTrigGateM ITS:RefTrigMaskM                         / ITS:RefTrigMaskM ITS:RefTrigWidthM                        / ITS:RefTrigWidthM ITS:TM:RefTrigTimeMonCC                  / ITS:TM:RefTrigTimeMonCC It:L:rf_disable_bo                       / It:L:rf_disable_bo It:rfmux_9_77MHz_mbbo                    / It:rfmux_9_77MHz_mbbo L-K1:DA:TrigCoarseDelayM                 / L-K1:DA:TrigCoarseDelayM L-K1:DA:TrigDelayM                       / L-K1:DA:TrigDelayM L-K1:DA:TrigFineDelayM                   / L-K1:DA:TrigFineDelayM L-K1:DA:TrigGateM                        / L-K1:DA:TrigGateM L-K1:DA:TrigMaskM                        / L-K1:DA:TrigMaskM L-K1:DA:TrigWidthM                       / L-K1:DA:TrigWidthM L-K1:LLRF:TrigCoarseDelayM               / L-K1:LLRF:TrigCoarseDelayM L-K1:LLRF:TrigDelayM                     / L-K1:LLRF:TrigDelayM L-K1:LLRF:TrigFineDelayM                 / L-K1:LLRF:TrigFineDelayM L-K1:LLRF:TrigGateM                      / L-K1:LLRF:TrigGateM L-K1:LLRF:TrigMaskM                      / L-K1:LLRF:TrigMaskM L-K1:LLRF:TrigWidthM                     / L-K1:LLRF:TrigWidthM L-K1:MO:TrigCoarseDelayM                 / L-K1:MO:TrigCoarseDelayM L-K1:MO:TrigDelayM                       / L-K1:MO:TrigDelayM L-K1:MO:TrigFineDelayM                   / L-K1:MO:TrigFineDelayM L-K1:MO:TrigGateM                        / L-K1:MO:TrigGateM L-K1:MO:TrigMaskM                        / L-K1:MO:TrigMaskM L-K1:MO:TrigWidthM                       / L-K1:MO:TrigWidthM L-K2:DA:TrigCoarseDelayM                 / L-K2:DA:TrigCoarseDelayM L-K2:DA:TrigDelayM                       / L-K2:DA:TrigDelayM L-K2:DA:TrigFineDelayM                   / L-K2:DA:TrigFineDelayM L-K2:DA:TrigGateM                        / L-K2:DA:TrigGateM L-K2:DA:TrigMaskM                        / L-K2:DA:TrigMaskM L-K2:DA:TrigWidthM                       / L-K2:DA:TrigWidthM L-K2:LLRF:TrigCoarseDelayM               / L-K2:LLRF:TrigCoarseDelayM L-K2:LLRF:TrigDelayM                     / L-K2:LLRF:TrigDelayM L-K2:LLRF:TrigFineDelayM                 / L-K2:LLRF:TrigFineDelayM L-K2:LLRF:TrigGateM                      / L-K2:LLRF:TrigGateM L-K2:LLRF:TrigMaskM                      / L-K2:LLRF:TrigMaskM L-K2:LLRF:TrigWidthM                     / L-K2:LLRF:TrigWidthM L-K2:MO:TrigCoarseDelayM                 / L-K2:MO:TrigCoarseDelayM L-K2:MO:TrigDelayM                       / L-K2:MO:TrigDelayM L-K2:MO:TrigFineDelayM                   / L-K2:MO:TrigFineDelayM L-K2:MO:TrigGateM                        / L-K2:MO:TrigGateM L-K2:MO:TrigMaskM                        / L-K2:MO:TrigMaskM L-K2:MO:TrigWidthM                       / L-K2:MO:TrigWidthM L-K2:SLED:TrigCoarseDelayM               / L-K2:SLED:TrigCoarseDelayM L-K2:SLED:TrigDelayM                     / L-K2:SLED:TrigDelayM L-K2:SLED:TrigFineDelayM                 / L-K2:SLED:TrigFineDelayM L-K2:SLED:TrigGateM                      / L-K2:SLED:TrigGateM L-K2:SLED:TrigMaskM                      / L-K2:SLED:TrigMaskM L-K2:SLED:TrigWidthM                     / L-K2:SLED:TrigWidthM L-K3:DA:TrigCoarseDelayM                 / L-K3:DA:TrigCoarseDelayM L-K3:DA:TrigDelayM                       / L-K3:DA:TrigDelayM L-K3:DA:TrigFineDelayM                   / L-K3:DA:TrigFineDelayM L-K3:DA:TrigGateM                        / L-K3:DA:TrigGateM L-K3:DA:TrigMaskM                        / L-K3:DA:TrigMaskM L-K3:DA:TrigWidthM                       / L-K3:DA:TrigWidthM L-K3:LLRF:TrigCoarseDelayM               / L-K3:LLRF:TrigCoarseDelayM L-K3:LLRF:TrigDelayM                     / L-K3:LLRF:TrigDelayM L-K3:LLRF:TrigFineDelayM                 / L-K3:LLRF:TrigFineDelayM L-K3:LLRF:TrigGateM                      / L-K3:LLRF:TrigGateM L-K3:LLRF:TrigMaskM                      / L-K3:LLRF:TrigMaskM L-K3:LLRF:TrigWidthM                     / L-K3:LLRF:TrigWidthM L-K3:MO:TrigCoarseDelayM                 / L-K3:MO:TrigCoarseDelayM L-K3:MO:TrigDelayM                       / L-K3:MO:TrigDelayM L-K3:MO:TrigFineDelayM                   / L-K3:MO:TrigFineDelayM L-K3:MO:TrigGateM                        / L-K3:MO:TrigGateM L-K3:MO:TrigMaskM                        / L-K3:MO:TrigMaskM L-K3:MO:TrigWidthM                       / L-K3:MO:TrigWidthM L-K3:SLED:TrigCoarseDelayM               / L-K3:SLED:TrigCoarseDelayM L-K3:SLED:TrigDelayM                     / L-K3:SLED:TrigDelayM L-K3:SLED:TrigFineDelayM                 / L-K3:SLED:TrigFineDelayM L-K3:SLED:TrigGateM                      / L-K3:SLED:TrigGateM L-K3:SLED:TrigMaskM                      / L-K3:SLED:TrigMaskM L-K3:SLED:TrigWidthM                     / L-K3:SLED:TrigWidthM L-K4:DA:TrigCoarseDelayM                 / L-K4:DA:TrigCoarseDelayM L-K4:DA:TrigDelayM                       / L-K4:DA:TrigDelayM L-K4:DA:TrigFineDelayM                   / L-K4:DA:TrigFineDelayM L-K4:DA:TrigGateM                        / L-K4:DA:TrigGateM L-K4:DA:TrigMaskM                        / L-K4:DA:TrigMaskM L-K4:DA:TrigWidthM                       / L-K4:DA:TrigWidthM L-K4:LLRF:TrigCoarseDelayM               / L-K4:LLRF:TrigCoarseDelayM L-K4:LLRF:TrigDelayM                     / L-K4:LLRF:TrigDelayM L-K4:LLRF:TrigFineDelayM                 / L-K4:LLRF:TrigFineDelayM L-K4:LLRF:TrigGateM                      / L-K4:LLRF:TrigGateM L-K4:LLRF:TrigMaskM                      / L-K4:LLRF:TrigMaskM L-K4:LLRF:TrigWidthM                     / L-K4:LLRF:TrigWidthM L-K4:MO:TrigCoarseDelayM                 / L-K4:MO:TrigCoarseDelayM L-K4:MO:TrigDelayM                       / L-K4:MO:TrigDelayM L-K4:MO:TrigFineDelayM                   / L-K4:MO:TrigFineDelayM L-K4:MO:TrigGateM                        / L-K4:MO:TrigGateM L-K4:MO:TrigMaskM                        / L-K4:MO:TrigMaskM L-K4:MO:TrigWidthM                       / L-K4:MO:TrigWidthM L-K4:SLED:TrigCoarseDelayM               / L-K4:SLED:TrigCoarseDelayM L-K4:SLED:TrigDelayM                     / L-K4:SLED:TrigDelayM L-K4:SLED:TrigFineDelayM                 / L-K4:SLED:TrigFineDelayM L-K4:SLED:TrigGateM                      / L-K4:SLED:TrigGateM L-K4:SLED:TrigMaskM                      / L-K4:SLED:TrigMaskM L-K4:SLED:TrigWidthM                     / L-K4:SLED:TrigWidthM L-K5:DA:TrigCoarseDelayM                 / L-K5:DA:TrigCoarseDelayM L-K5:DA:TrigDelayM                       / L-K5:DA:TrigDelayM L-K5:DA:TrigFineDelayM                   / L-K5:DA:TrigFineDelayM L-K5:DA:TrigGateM                        / L-K5:DA:TrigGateM L-K5:DA:TrigMaskM                        / L-K5:DA:TrigMaskM L-K5:DA:TrigWidthM                       / L-K5:DA:TrigWidthM L-K5:LLRF:TrigCoarseDelayM               / L-K5:LLRF:TrigCoarseDelayM L-K5:LLRF:TrigDelayM                     / L-K5:LLRF:TrigDelayM L-K5:LLRF:TrigFineDelayM                 / L-K5:LLRF:TrigFineDelayM L-K5:LLRF:TrigGateM                      / L-K5:LLRF:TrigGateM L-K5:LLRF:TrigMaskM                      / L-K5:LLRF:TrigMaskM L-K5:LLRF:TrigWidthM                     / L-K5:LLRF:TrigWidthM L-K5:MO:TrigCoarseDelayM                 / L-K5:MO:TrigCoarseDelayM L-K5:MO:TrigDelayM                       / L-K5:MO:TrigDelayM L-K5:MO:TrigFineDelayM                   / L-K5:MO:TrigFineDelayM L-K5:MO:TrigGateM                        / L-K5:MO:TrigGateM L-K5:MO:TrigMaskM                        / L-K5:MO:TrigMaskM L-K5:MO:TrigWidthM                       / L-K5:MO:TrigWidthM L-K5:SLED:TrigCoarseDelayM               / L-K5:SLED:TrigCoarseDelayM L-K5:SLED:TrigDelayM                     / L-K5:SLED:TrigDelayM L-K5:SLED:TrigFineDelayM                 / L-K5:SLED:TrigFineDelayM L-K5:SLED:TrigGateM                      / L-K5:SLED:TrigGateM L-K5:SLED:TrigMaskM                      / L-K5:SLED:TrigMaskM L-K5:SLED:TrigWidthM                     / L-K5:SLED:TrigWidthM L-K6:DA:TrigCoarseDelayM                 / L-K6:DA:TrigCoarseDelayM L-K6:DA:TrigDelayM                       / L-K6:DA:TrigDelayM L-K6:DA:TrigFineDelayM                   / L-K6:DA:TrigFineDelayM L-K6:DA:TrigGateM                        / L-K6:DA:TrigGateM L-K6:DA:TrigMaskM                        / L-K6:DA:TrigMaskM L-K6:DA:TrigWidthM                       / L-K6:DA:TrigWidthM L-K6:LLRF:TrigCoarseDelayM               / L-K6:LLRF:TrigCoarseDelayM L-K6:LLRF:TrigDelayM                     / L-K6:LLRF:TrigDelayM L-K6:LLRF:TrigFineDelayM                 / L-K6:LLRF:TrigFineDelayM L-K6:LLRF:TrigGateM                      / L-K6:LLRF:TrigGateM L-K6:LLRF:TrigMaskM                      / L-K6:LLRF:TrigMaskM L-K6:LLRF:TrigWidthM                     / L-K6:LLRF:TrigWidthM L-K6:MO:TrigCoarseDelayM                 / L-K6:MO:TrigCoarseDelayM L-K6:MO:TrigDelayM                       / L-K6:MO:TrigDelayM L-K6:MO:TrigFineDelayM                   / L-K6:MO:TrigFineDelayM L-K6:MO:TrigGateM                        / L-K6:MO:TrigGateM L-K6:MO:TrigMaskM                        / L-K6:MO:TrigMaskM L-K6:MO:TrigWidthM                       / L-K6:MO:TrigWidthM L-K6:SLED:TrigCoarseDelayM               / L-K6:SLED:TrigCoarseDelayM L-K6:SLED:TrigDelayM                     / L-K6:SLED:TrigDelayM L-K6:SLED:TrigFineDelayM                 / L-K6:SLED:TrigFineDelayM L-K6:SLED:TrigGateM                      / L-K6:SLED:TrigGateM L-K6:SLED:TrigMaskM                      / L-K6:SLED:TrigMaskM L-K6:SLED:TrigWidthM                     / L-K6:SLED:TrigWidthM L-RF:SCOPE:MTMTrig1CoarseDelayM          / L-RF:SCOPE:MTMTrig1CoarseDelayM L-RF:SCOPE:MTMTrig1DelayM                / L-RF:SCOPE:MTMTrig1DelayM L-RF:SCOPE:MTMTrig1FineDelayM            / L-RF:SCOPE:MTMTrig1FineDelayM L-RF:SCOPE:MTMTrig1GateM                 / L-RF:SCOPE:MTMTrig1GateM L-RF:SCOPE:MTMTrig1MaskM                 / L-RF:SCOPE:MTMTrig1MaskM L-RF:SCOPE:MTMTrig1WidthM                / L-RF:SCOPE:MTMTrig1WidthM L-RF:SCOPE:MTMTrig2CoarseDelayM          / L-RF:SCOPE:MTMTrig2CoarseDelayM L-RF:SCOPE:MTMTrig2DelayM                / L-RF:SCOPE:MTMTrig2DelayM L-RF:SCOPE:MTMTrig2FineDelayM            / L-RF:SCOPE:MTMTrig2FineDelayM L-RF:SCOPE:MTMTrig2GateM                 / L-RF:SCOPE:MTMTrig2GateM L-RF:SCOPE:MTMTrig2MaskM                 / L-RF:SCOPE:MTMTrig2MaskM L-RF:SCOPE:MTMTrig2WidthM                / L-RF:SCOPE:MTMTrig2WidthM L-TM:ATSEnableM                          / L-TM:ATSEnableM L-TM:AsyncRateM                          / L-TM:AsyncRateM L-TM:BeamRateM                           / L-TM:BeamRateM L-TM:LaserRateM                          / L-TM:LaserRateM L-TM:LinkErrCounterM                     / L-TM:LinkErrCounterM L-TM:LinkHealthM                         / L-TM:LinkHealthM L-TM:ModRateM                            / L-TM:ModRateM L-TM:RFRateM                             / L-TM:RFRateM L-TM:RGRateM                             / L-TM:RGRateM L-TM:RefTrigRateM                        / L-TM:RefTrigRateM L-TM:SIMEnableM                          / L-TM:SIMEnableM L-VID:PreTrigCoarseDelayM                / L-VID:PreTrigCoarseDelayM L-VID:PreTrigDelayM                      / L-VID:PreTrigDelayM L-VID:PreTrigFineDelayM                  / L-VID:PreTrigFineDelayM L-VID:PreTrigGateM                       / L-VID:PreTrigGateM L-VID:PreTrigMaskM                       / L-VID:PreTrigMaskM L-VID:PreTrigWidthM                      / L-VID:PreTrigWidthM L:LR:diagTrigTimeM                       / L:LR:diagTrigTimeM L:LR:diag2TrigTimeM                      / L:LR:diag2TrigTimeM L:LR:flashLampTrigTimeM                  / L:LR:flashLampTrigTimeM L:LR:pockelCellTrigTimeM                 / L:LR:pockelCellTrigTimeM L:LR:pockelCell1TrigTimeM                / L:LR:pockelCell1TrigTimeM L:LR:pockelCell2TrigTimeM                / L:LR:pockelCell2TrigTimeM L:LR:trigRateM                           / L:LR:trigRateM L:RFRateThrottleResetCoarseDelayM        / L:RFRateThrottleResetCoarseDelayM L:RFRateThrottleResetDelayM              / L:RFRateThrottleResetDelayM L:RFRateThrottleResetFineDelayM          / L:RFRateThrottleResetFineDelayM L:RFRateThrottleResetGateM               / L:RFRateThrottleResetGateM L:RFRateThrottleResetMaskM               / L:RFRateThrottleResetMaskM L:RFRateThrottleResetWidthM              / L:RFRateThrottleResetWidthM L:RFRateThrottleSetCoarseDelayM          / L:RFRateThrottleSetCoarseDelayM L:RFRateThrottleSetDelayM                / L:RFRateThrottleSetDelayM L:RFRateThrottleSetFineDelayM            / L:RFRateThrottleSetFineDelayM L:RFRateThrottleSetGateM                 / L:RFRateThrottleSetGateM L:RFRateThrottleSetMaskM                 / L:RFRateThrottleSetMaskM L:RFRateThrottleSetWidthM                / L:RFRateThrottleSetWidthM LEA-TM:EVR1-DC:Lck-Sts                   / LEA-TM:EVR1-DC:Lck-Sts LEA-TM:EVR1-DC:LckDat-Sts                / LEA-TM:EVR1-DC:LckDat-Sts LEA-TM:EVR1-DC:LckTrk-Sts                / LEA-TM:EVR1-DC:LckTrk-Sts LEA-TM:EVR1-Out:Int:State-Sts            / LEA-TM:EVR1-Out:Int:State-Sts LEA-TM:EVR1:Link-Sts                     / LEA-TM:EVR1:Link-Sts LEA-TM:EVR1:Pll-Sts                      / LEA-TM:EVR1:Pll-Sts LEA-TM:EVR1:Time:Valid-Sts               / LEA-TM:EVR1:Time:Valid-Sts LEA:DiagTrig1CoarseDelayM                / LEA:DiagTrig1CoarseDelayM LEA:DiagTrig1DelayM                      / LEA:DiagTrig1DelayM LEA:DiagTrig1FineDelayM                  / LEA:DiagTrig1FineDelayM LEA:DiagTrig1GateM                       / LEA:DiagTrig1GateM LEA:DiagTrig1MaskM                       / LEA:DiagTrig1MaskM LEA:DiagTrig1WidthM                      / LEA:DiagTrig1WidthM LEA:DiagTrig2CoarseDelayM                / LEA:DiagTrig2CoarseDelayM LEA:DiagTrig2DelayM                      / LEA:DiagTrig2DelayM LEA:DiagTrig2FineDelayM                  / LEA:DiagTrig2FineDelayM LEA:DiagTrig2GateM                       / LEA:DiagTrig2GateM LEA:DiagTrig2MaskM                       / LEA:DiagTrig2MaskM LEA:DiagTrig2WidthM                      / LEA:DiagTrig2WidthM LEA:DiagTrig3CoarseDelayM                / LEA:DiagTrig3CoarseDelayM LEA:DiagTrig3DelayM                      / LEA:DiagTrig3DelayM LEA:DiagTrig3FineDelayM                  / LEA:DiagTrig3FineDelayM LEA:DiagTrig3GateM                       / LEA:DiagTrig3GateM LEA:DiagTrig3MaskM                       / LEA:DiagTrig3MaskM LEA:DiagTrig3WidthM                      / LEA:DiagTrig3WidthM LEA:DiagTrig4CoarseDelayM                / LEA:DiagTrig4CoarseDelayM LEA:DiagTrig4DelayM                      / LEA:DiagTrig4DelayM LEA:DiagTrig4FineDelayM                  / LEA:DiagTrig4FineDelayM LEA:DiagTrig4GateM                       / LEA:DiagTrig4GateM LEA:DiagTrig4MaskM                       / LEA:DiagTrig4MaskM LEA:DiagTrig4WidthM                      / LEA:DiagTrig4WidthM LI:It:injSysBunchCntAI                   / LI:It:injSysBunchCntAI LI:It:injSysCycleCntAI                   / LI:It:injSysCycleCntAI LI:TM:ASYNC:pretrigRateMeasM             / LI:TM:ASYNC:pretrigRateMeasM LI:TM:ASYNC:rfRateMeasM                  / LI:TM:ASYNC:rfRateMeasM LI:TM:LASER:pretrigSourceM               / LI:TM:LASER:pretrigSourceM LI:TM:LASER:syncClkRcvdM                 / LI:TM:LASER:syncClkRcvdM LI:TM:LASER:syncdTo119M                  / LI:TM:LASER:syncdTo119M LI:TM:LASER:trigSourceM                  / LI:TM:LASER:trigSourceM LI:TM:L1DriveAmpSourceM                  / LI:TM:L1DriveAmpSourceM LI:TM:L1llrfSourceM                      / LI:TM:L1llrfSourceM LI:TM:L1llrfSource0M                     / LI:TM:L1llrfSource0M LI:TM:L1llrfSource1M                     / LI:TM:L1llrfSource1M LI:TM:L1llrfSource2M                     / LI:TM:L1llrfSource2M LI:TM:L1llrfSource3M                     / LI:TM:L1llrfSource3M LI:TM:L1modTrigSourceM                   / LI:TM:L1modTrigSourceM LI:TM:L2DriveAmpSourceM                  / LI:TM:L2DriveAmpSourceM LI:TM:L2llrfSourceM                      / LI:TM:L2llrfSourceM LI:TM:L2modTrigSourceM                   / LI:TM:L2modTrigSourceM LI:TM:L3DriveAmpSourceM                  / LI:TM:L3DriveAmpSourceM LI:TM:L3llrfSourceM                      / LI:TM:L3llrfSourceM LI:TM:L3llrfSource0M                     / LI:TM:L3llrfSource0M LI:TM:L3llrfSource1M                     / LI:TM:L3llrfSource1M LI:TM:L3llrfSource2M                     / LI:TM:L3llrfSource2M LI:TM:L3llrfSource3M                     / LI:TM:L3llrfSource3M LI:TM:L3modTrigSourceM                   / LI:TM:L3modTrigSourceM LI:TM:L4DriveAmpSourceM                  / LI:TM:L4DriveAmpSourceM LI:TM:L4llrfSourceM                      / LI:TM:L4llrfSourceM LI:TM:L4modTrigSourceM                   / LI:TM:L4modTrigSourceM LI:TM:L5DriveAmpSourceM                  / LI:TM:L5DriveAmpSourceM LI:TM:L5llrfSourceM                      / LI:TM:L5llrfSourceM LI:TM:L5modTrigSourceM                   / LI:TM:L5modTrigSourceM LI:TM:L6DriveAmpSourceM                  / LI:TM:L6DriveAmpSourceM LI:TM:L6llrfSourceM                      / LI:TM:L6llrfSourceM LI:TM:L6modTrigSourceM                   / LI:TM:L6modTrigSourceM LI:TM:MTM-SCOPE1TimeMonCC                / LI:TM:MTM-SCOPE1TimeMonCC LI:TM:MTM-SCOPE2TimeMonCC                / LI:TM:MTM-SCOPE2TimeMonCC LI:TM:TGU:asyncTrigsDetM                 / LI:TM:TGU:asyncTrigsDetM LI:TM:TGU:itsBeamPtrigDetM               / LI:TM:TGU:itsBeamPtrigDetM LI:TM:TGU:itsLsrPtrigDetM                / LI:TM:TGU:itsLsrPtrigDetM LI:TM:TGU:itsRefTrigDetM                 / LI:TM:TGU:itsRefTrigDetM LI:TM:TGU:itsRfPtrigDetM                 / LI:TM:TGU:itsRfPtrigDetM LI:TM:TGU:sync119MHzM                    / LI:TM:TGU:sync119MHzM LI:TM:asyncPretrigRateMeasM              / LI:TM:asyncPretrigRateMeasM LI:TM:asyncRfRateMeasM                   / LI:TM:asyncRfRateMeasM LI:TM:diodePumpRateMeasM                 / LI:TM:diodePumpRateMeasM LI:TM:elDmuTrig1MonCC                    / LI:TM:elDmuTrig1MonCC LI:TM:elDmuTrig2MonCC                    / LI:TM:elDmuTrig2MonCC LI:TM:elDmuTrig3MonCC                    / LI:TM:elDmuTrig3MonCC LI:TM:elDmuTrig4MonCC                    / LI:TM:elDmuTrig4MonCC LI:TM:itsLsrRateMeasM                    / LI:TM:itsLsrRateMeasM LI:TM:liBeamRateMeasM                    / LI:TM:liBeamRateMeasM LI:TM:liGunRateMeasM                     / LI:TM:liGunRateMeasM LI:TM:liModRateMeasM                     / LI:TM:liModRateMeasM LI:TM:liRfRateMeasM                      / LI:TM:liRfRateMeasM LI:TM:rfgDiagTrigSourceM                 / LI:TM:rfgDiagTrigSourceM LTP:DU:Trig1CoarseDelayM                 / LTP:DU:Trig1CoarseDelayM LTP:DU:Trig1DelayM                       / LTP:DU:Trig1DelayM LTP:DU:Trig1FineDelayM                   / LTP:DU:Trig1FineDelayM LTP:DU:Trig1GateM                        / LTP:DU:Trig1GateM LTP:DU:Trig1MaskM                        / LTP:DU:Trig1MaskM LTP:DU:Trig1WidthM                       / LTP:DU:Trig1WidthM LTP:DU:Trig2CoarseDelayM                 / LTP:DU:Trig2CoarseDelayM LTP:DU:Trig2DelayM                       / LTP:DU:Trig2DelayM LTP:DU:Trig2FineDelayM                   / LTP:DU:Trig2FineDelayM LTP:DU:Trig2GateM                        / LTP:DU:Trig2GateM LTP:DU:Trig2MaskM                        / LTP:DU:Trig2MaskM LTP:DU:Trig2WidthM                       / LTP:DU:Trig2WidthM LTP:TM:elDmuTrig1MonCC                   / LTP:TM:elDmuTrig1MonCC LTP:TM:elDmuTrig2MonCC                   / LTP:TM:elDmuTrig2MonCC LTS:DU1:TM:4:sourceM                     / LTS:DU1:TM:4:sourceM LTS:TM:elDmu1Trig4MonCC                  / LTS:TM:elDmu1Trig4MonCC L1-TM:DiodePumpRateM                     / L1-TM:DiodePumpRateM L1-TM:EVR1-DC:Lck-Sts                    / L1-TM:EVR1-DC:Lck-Sts L1-TM:EVR1-DC:LckDat-Sts                 / L1-TM:EVR1-DC:LckDat-Sts L1-TM:EVR1-DC:LckTrk-Sts                 / L1-TM:EVR1-DC:LckTrk-Sts L1-TM:EVR1-Out:Int:State-Sts             / L1-TM:EVR1-Out:Int:State-Sts L1-TM:EVR1:Link-Sts                      / L1-TM:EVR1:Link-Sts L1-TM:EVR1:Pll-Sts                       / L1-TM:EVR1:Pll-Sts L1-TM:EVR1:Time:Valid-Sts                / L1-TM:EVR1:Time:Valid-Sts L1:DU:Trig1CoarseDelayM                  / L1:DU:Trig1CoarseDelayM L1:DU:Trig1DelayM                        / L1:DU:Trig1DelayM L1:DU:Trig1FineDelayM                    / L1:DU:Trig1FineDelayM L1:DU:Trig1GateM                         / L1:DU:Trig1GateM L1:DU:Trig1MaskM                         / L1:DU:Trig1MaskM L1:DU:Trig1WidthM                        / L1:DU:Trig1WidthM L1:DU:Trig2CoarseDelayM                  / L1:DU:Trig2CoarseDelayM L1:DU:Trig2DelayM                        / L1:DU:Trig2DelayM L1:DU:Trig2FineDelayM                    / L1:DU:Trig2FineDelayM L1:DU:Trig2GateM                         / L1:DU:Trig2GateM L1:DU:Trig2MaskM                         / L1:DU:Trig2MaskM L1:DU:Trig2WidthM                        / L1:DU:Trig2WidthM L1:DU:Trig3CoarseDelayM                  / L1:DU:Trig3CoarseDelayM L1:DU:Trig3DelayM                        / L1:DU:Trig3DelayM L1:DU:Trig3FineDelayM                    / L1:DU:Trig3FineDelayM L1:DU:Trig3GateM                         / L1:DU:Trig3GateM L1:DU:Trig3MaskM                         / L1:DU:Trig3MaskM L1:DU:Trig3WidthM                        / L1:DU:Trig3WidthM L1:DU1:TM:4:sourceM                      / L1:DU1:TM:4:sourceM L1:DU1:Trig4CoarseDelayM                 / L1:DU1:Trig4CoarseDelayM L1:DU1:Trig4DelayM                       / L1:DU1:Trig4DelayM L1:DU1:Trig4FineDelayM                   / L1:DU1:Trig4FineDelayM L1:DU1:Trig4GateM                        / L1:DU1:Trig4GateM L1:DU1:Trig4MaskM                        / L1:DU1:Trig4MaskM L1:DU1:Trig4WidthM                       / L1:DU1:Trig4WidthM L1:DU2:TM:4:sourceM                      / L1:DU2:TM:4:sourceM L1:DU2:Trig4CoarseDelayM                 / L1:DU2:Trig4CoarseDelayM L1:DU2:Trig4DelayM                       / L1:DU2:Trig4DelayM L1:DU2:Trig4FineDelayM                   / L1:DU2:Trig4FineDelayM L1:DU2:Trig4GateM                        / L1:DU2:Trig4GateM L1:DU2:Trig4MaskM                        / L1:DU2:Trig4MaskM L1:DU2:Trig4WidthM                       / L1:DU2:Trig4WidthM L1:PCG:BPMTrig:sourceM                   / L1:PCG:BPMTrig:sourceM L1:PCG:LSR:ADCTrigCoarseDelayM           / L1:PCG:LSR:ADCTrigCoarseDelayM L1:PCG:LSR:ADCTrigDelayM                 / L1:PCG:LSR:ADCTrigDelayM L1:PCG:LSR:ADCTrigFineDelayM             / L1:PCG:LSR:ADCTrigFineDelayM L1:PCG:LSR:ADCTrigGateM                  / L1:PCG:LSR:ADCTrigGateM L1:PCG:LSR:ADCTrigMaskM                  / L1:PCG:LSR:ADCTrigMaskM L1:PCG:LSR:ADCTrigWidthM                 / L1:PCG:LSR:ADCTrigWidthM L1:PCG:LSR:DiodePumpTrigCoarseDelayM     / L1:PCG:LSR:DiodePumpTrigCoarseDelayM L1:PCG:LSR:DiodePumpTrigDelayM           / L1:PCG:LSR:DiodePumpTrigDelayM L1:PCG:LSR:DiodePumpTrigFineDelayM       / L1:PCG:LSR:DiodePumpTrigFineDelayM L1:PCG:LSR:DiodePumpTrigGateM            / L1:PCG:LSR:DiodePumpTrigGateM L1:PCG:LSR:DiodePumpTrigMaskM            / L1:PCG:LSR:DiodePumpTrigMaskM L1:PCG:LSR:DiodePumpTrigWidthM           / L1:PCG:LSR:DiodePumpTrigWidthM L1:PCG:LSR:LaserPreTrigCoarseDelayM      / L1:PCG:LSR:LaserPreTrigCoarseDelayM L1:PCG:LSR:LaserPreTrigDelayM            / L1:PCG:LSR:LaserPreTrigDelayM L1:PCG:LSR:LaserPreTrigFineDelayM        / L1:PCG:LSR:LaserPreTrigFineDelayM L1:PCG:LSR:LaserPreTrigGateM             / L1:PCG:LSR:LaserPreTrigGateM L1:PCG:LSR:LaserPreTrigMaskM             / L1:PCG:LSR:LaserPreTrigMaskM L1:PCG:LSR:LaserPreTrigWidthM            / L1:PCG:LSR:LaserPreTrigWidthM L1:PCG:LSR:PockelsCellTrigCoarseDelayM   / L1:PCG:LSR:PockelsCellTrigCoarseDelayM L1:PCG:LSR:PockelsCellTrigDelayM         / L1:PCG:LSR:PockelsCellTrigDelayM L1:PCG:LSR:PockelsCellTrigFineDelayM     / L1:PCG:LSR:PockelsCellTrigFineDelayM L1:PCG:LSR:PockelsCellTrigGateM          / L1:PCG:LSR:PockelsCellTrigGateM L1:PCG:LSR:PockelsCellTrigMaskM          / L1:PCG:LSR:PockelsCellTrigMaskM L1:PCG:LSR:PockelsCellTrigWidthM         / L1:PCG:LSR:PockelsCellTrigWidthM L1:PCG:LSR:RateThrottleResetCoarseDelayM / L1:PCG:LSR:RateThrottleResetCoarseDelayM L1:PCG:LSR:RateThrottleResetDelayM       / L1:PCG:LSR:RateThrottleResetDelayM L1:PCG:LSR:RateThrottleResetFineDelayM   / L1:PCG:LSR:RateThrottleResetFineDelayM L1:PCG:LSR:RateThrottleResetGateM        / L1:PCG:LSR:RateThrottleResetGateM L1:PCG:LSR:RateThrottleResetMaskM        / L1:PCG:LSR:RateThrottleResetMaskM L1:PCG:LSR:RateThrottleResetWidthM       / L1:PCG:LSR:RateThrottleResetWidthM L1:PCG:P:Trig1CoarseDelayM               / L1:PCG:P:Trig1CoarseDelayM L1:PCG:P:Trig1DelayM                     / L1:PCG:P:Trig1DelayM L1:PCG:P:Trig1FineDelayM                 / L1:PCG:P:Trig1FineDelayM L1:PCG:P:Trig1GateM                      / L1:PCG:P:Trig1GateM L1:PCG:P:Trig1MaskM                      / L1:PCG:P:Trig1MaskM L1:PCG:P:Trig1WidthM                     / L1:PCG:P:Trig1WidthM L1:PCG:P:Trig2CoarseDelayM               / L1:PCG:P:Trig2CoarseDelayM L1:PCG:P:Trig2DelayM                     / L1:PCG:P:Trig2DelayM L1:PCG:P:Trig2FineDelayM                 / L1:PCG:P:Trig2FineDelayM L1:PCG:P:Trig2GateM                      / L1:PCG:P:Trig2GateM L1:PCG:P:Trig2MaskM                      / L1:PCG:P:Trig2MaskM L1:PCG:P:Trig2WidthM                     / L1:PCG:P:Trig2WidthM L1:PCG:TM:BPMTrig1TimeMonCC              / L1:PCG:TM:BPMTrig1TimeMonCC L1:PCG:TM:BPMTrig2TimeMonCC              / L1:PCG:TM:BPMTrig2TimeMonCC L1:RG:IOCTrig1CoarseDelayM               / L1:RG:IOCTrig1CoarseDelayM L1:RG:IOCTrig1DelayM                     / L1:RG:IOCTrig1DelayM L1:RG:IOCTrig1FineDelayM                 / L1:RG:IOCTrig1FineDelayM L1:RG:IOCTrig1GateM                      / L1:RG:IOCTrig1GateM L1:RG:IOCTrig1MaskM                      / L1:RG:IOCTrig1MaskM L1:RG:IOCTrig1WidthM                     / L1:RG:IOCTrig1WidthM L1:RG:IOCTrig2CoarseDelayM               / L1:RG:IOCTrig2CoarseDelayM L1:RG:IOCTrig2DelayM                     / L1:RG:IOCTrig2DelayM L1:RG:IOCTrig2FineDelayM                 / L1:RG:IOCTrig2FineDelayM L1:RG:IOCTrig2GateM                      / L1:RG:IOCTrig2GateM L1:RG:IOCTrig2MaskM                      / L1:RG:IOCTrig2MaskM L1:RG:IOCTrig2WidthM                     / L1:RG:IOCTrig2WidthM L1:RG:RateThrottleResetCoarseDelayM      / L1:RG:RateThrottleResetCoarseDelayM L1:RG:RateThrottleResetDelayM            / L1:RG:RateThrottleResetDelayM L1:RG:RateThrottleResetFineDelayM        / L1:RG:RateThrottleResetFineDelayM L1:RG:RateThrottleResetGateM             / L1:RG:RateThrottleResetGateM L1:RG:RateThrottleResetMaskM             / L1:RG:RateThrottleResetMaskM L1:RG:RateThrottleResetWidthM            / L1:RG:RateThrottleResetWidthM L1:RG:RateThrottleSetCoarseDelayM        / L1:RG:RateThrottleSetCoarseDelayM L1:RG:RateThrottleSetDelayM              / L1:RG:RateThrottleSetDelayM L1:RG:RateThrottleSetFineDelayM          / L1:RG:RateThrottleSetFineDelayM L1:RG:RateThrottleSetGateM               / L1:RG:RateThrottleSetGateM L1:RG:RateThrottleSetMaskM               / L1:RG:RateThrottleSetMaskM L1:RG:RateThrottleSetWidthM              / L1:RG:RateThrottleSetWidthM L1:RG1:KIK:ChargePSCUTrigCoarseDelayM    / L1:RG1:KIK:ChargePSCUTrigCoarseDelayM L1:RG1:KIK:ChargePSCUTrigDelayM          / L1:RG1:KIK:ChargePSCUTrigDelayM L1:RG1:KIK:ChargePSCUTrigFineDelayM      / L1:RG1:KIK:ChargePSCUTrigFineDelayM L1:RG1:KIK:ChargePSCUTrigGateM           / L1:RG1:KIK:ChargePSCUTrigGateM L1:RG1:KIK:ChargePSCUTrigMaskM           / L1:RG1:KIK:ChargePSCUTrigMaskM L1:RG1:KIK:ChargePSCUTrigWidthM          / L1:RG1:KIK:ChargePSCUTrigWidthM L1:RG1:KIK:ChargePSTrigCoarseDelayM      / L1:RG1:KIK:ChargePSTrigCoarseDelayM L1:RG1:KIK:ChargePSTrigDelayM            / L1:RG1:KIK:ChargePSTrigDelayM L1:RG1:KIK:ChargePSTrigFineDelayM        / L1:RG1:KIK:ChargePSTrigFineDelayM L1:RG1:KIK:ChargePSTrigGateM             / L1:RG1:KIK:ChargePSTrigGateM L1:RG1:KIK:ChargePSTrigMaskM             / L1:RG1:KIK:ChargePSTrigMaskM L1:RG1:KIK:ChargePSTrigWidthM            / L1:RG1:KIK:ChargePSTrigWidthM L1:RG1:KIK:DischargeTrigCoarseDelayM     / L1:RG1:KIK:DischargeTrigCoarseDelayM L1:RG1:KIK:DischargeTrigDelayM           / L1:RG1:KIK:DischargeTrigDelayM L1:RG1:KIK:DischargeTrigFineDelayM       / L1:RG1:KIK:DischargeTrigFineDelayM L1:RG1:KIK:DischargeTrigGateM            / L1:RG1:KIK:DischargeTrigGateM L1:RG1:KIK:DischargeTrigMaskM            / L1:RG1:KIK:DischargeTrigMaskM L1:RG1:KIK:DischargeTrigWidthM           / L1:RG1:KIK:DischargeTrigWidthM L1:RG1:KIK:SampleTrigCoarseDelayM        / L1:RG1:KIK:SampleTrigCoarseDelayM L1:RG1:KIK:SampleTrigDelayM              / L1:RG1:KIK:SampleTrigDelayM L1:RG1:KIK:SampleTrigFineDelayM          / L1:RG1:KIK:SampleTrigFineDelayM L1:RG1:KIK:SampleTrigGateM               / L1:RG1:KIK:SampleTrigGateM L1:RG1:KIK:SampleTrigMaskM               / L1:RG1:KIK:SampleTrigMaskM L1:RG1:KIK:SampleTrigWidthM              / L1:RG1:KIK:SampleTrigWidthM L1:RG1:KIK:chargePSCUTimeMonCC           / L1:RG1:KIK:chargePSCUTimeMonCC L1:RG1:KIK:chargePSCUWidthMonCC          / L1:RG1:KIK:chargePSCUWidthMonCC L1:RG1:KIK:chargePSTimeMonCC             / L1:RG1:KIK:chargePSTimeMonCC L1:RG1:KIK:chargePSWidthMonCC            / L1:RG1:KIK:chargePSWidthMonCC L1:RG1:KIK:sampleTimeMonCC               / L1:RG1:KIK:sampleTimeMonCC L1:RG1:KIK:trigTimeMonCC                 / L1:RG1:KIK:trigTimeMonCC L1:RG2:KIK:ChargePSCUTrigCoarseDelayM    / L1:RG2:KIK:ChargePSCUTrigCoarseDelayM L1:RG2:KIK:ChargePSCUTrigDelayM          / L1:RG2:KIK:ChargePSCUTrigDelayM L1:RG2:KIK:ChargePSCUTrigFineDelayM      / L1:RG2:KIK:ChargePSCUTrigFineDelayM L1:RG2:KIK:ChargePSCUTrigGateM           / L1:RG2:KIK:ChargePSCUTrigGateM L1:RG2:KIK:ChargePSCUTrigMaskM           / L1:RG2:KIK:ChargePSCUTrigMaskM L1:RG2:KIK:ChargePSCUTrigWidthM          / L1:RG2:KIK:ChargePSCUTrigWidthM L1:RG2:KIK:ChargePSTrigCoarseDelayM      / L1:RG2:KIK:ChargePSTrigCoarseDelayM L1:RG2:KIK:ChargePSTrigDelayM            / L1:RG2:KIK:ChargePSTrigDelayM L1:RG2:KIK:ChargePSTrigFineDelayM        / L1:RG2:KIK:ChargePSTrigFineDelayM L1:RG2:KIK:ChargePSTrigGateM             / L1:RG2:KIK:ChargePSTrigGateM L1:RG2:KIK:ChargePSTrigMaskM             / L1:RG2:KIK:ChargePSTrigMaskM L1:RG2:KIK:ChargePSTrigWidthM            / L1:RG2:KIK:ChargePSTrigWidthM L1:RG2:KIK:DischargeTrigCoarseDelayM     / L1:RG2:KIK:DischargeTrigCoarseDelayM L1:RG2:KIK:DischargeTrigDelayM           / L1:RG2:KIK:DischargeTrigDelayM L1:RG2:KIK:DischargeTrigFineDelayM       / L1:RG2:KIK:DischargeTrigFineDelayM L1:RG2:KIK:DischargeTrigGateM            / L1:RG2:KIK:DischargeTrigGateM L1:RG2:KIK:DischargeTrigMaskM            / L1:RG2:KIK:DischargeTrigMaskM L1:RG2:KIK:DischargeTrigWidthM           / L1:RG2:KIK:DischargeTrigWidthM L1:RG2:KIK:SampleTrigCoarseDelayM        / L1:RG2:KIK:SampleTrigCoarseDelayM L1:RG2:KIK:SampleTrigDelayM              / L1:RG2:KIK:SampleTrigDelayM L1:RG2:KIK:SampleTrigFineDelayM          / L1:RG2:KIK:SampleTrigFineDelayM L1:RG2:KIK:SampleTrigGateM               / L1:RG2:KIK:SampleTrigGateM L1:RG2:KIK:SampleTrigMaskM               / L1:RG2:KIK:SampleTrigMaskM L1:RG2:KIK:SampleTrigWidthM              / L1:RG2:KIK:SampleTrigWidthM L1:RG2:KIK:chargePSCUTimeMonCC           / L1:RG2:KIK:chargePSCUTimeMonCC L1:RG2:KIK:chargePSCUWidthMonCC          / L1:RG2:KIK:chargePSCUWidthMonCC L1:RG2:KIK:chargePSTimeMonCC             / L1:RG2:KIK:chargePSTimeMonCC L1:RG2:KIK:chargePSWidthMonCC            / L1:RG2:KIK:chargePSWidthMonCC L1:RG2:KIK:chargeTrigC                   / L1:RG2:KIK:chargeTrigC L1:RG2:KIK:sampleTimeMonCC               / L1:RG2:KIK:sampleTimeMonCC L1:RG2:KIK:trigTimeMonCC                 / L1:RG2:KIK:trigTimeMonCC L1:TM:DAGateStartMonCC                   / L1:TM:DAGateStartMonCC L1:TM:DAGateWidthMonCC                   / L1:TM:DAGateWidthMonCC L1:TM:RFGIOC1TimeMonCC                   / L1:TM:RFGIOC1TimeMonCC L1:TM:elDmuTrig1MonCC                    / L1:TM:elDmuTrig1MonCC L1:TM:elDmuTrig2MonCC                    / L1:TM:elDmuTrig2MonCC L1:TM:elDmuTrig3MonCC                    / L1:TM:elDmuTrig3MonCC L1:TM:elDmu1Trig4MonCC                   / L1:TM:elDmu1Trig4MonCC L1:TM:elDmu2Trig4MonCC                   / L1:TM:elDmu2Trig4MonCC L1:TM:hiPwrRfOnLinkAI                    / L1:TM:hiPwrRfOnLinkAI L1:TM:llrfGateStartMonCC                 / L1:TM:llrfGateStartMonCC L1:TM:llrfGateWidthMonCC                 / L1:TM:llrfGateWidthMonCC L1:TM:llrfSelectedGateStartM             / L1:TM:llrfSelectedGateStartM L1:TM:llrfSelectedGateWidthM             / L1:TM:llrfSelectedGateWidthM L1:TM:modTrigMonCC                       / L1:TM:modTrigMonCC L2:DU:Trig1CoarseDelayM                  / L2:DU:Trig1CoarseDelayM L2:DU:Trig1DelayM                        / L2:DU:Trig1DelayM L2:DU:Trig1FineDelayM                    / L2:DU:Trig1FineDelayM L2:DU:Trig1GateM                         / L2:DU:Trig1GateM L2:DU:Trig1MaskM                         / L2:DU:Trig1MaskM L2:DU:Trig1WidthM                        / L2:DU:Trig1WidthM L2:DU:Trig2CoarseDelayM                  / L2:DU:Trig2CoarseDelayM L2:DU:Trig2DelayM                        / L2:DU:Trig2DelayM L2:DU:Trig2FineDelayM                    / L2:DU:Trig2FineDelayM L2:DU:Trig2GateM                         / L2:DU:Trig2GateM L2:DU:Trig2MaskM                         / L2:DU:Trig2MaskM L2:DU:Trig2WidthM                        / L2:DU:Trig2WidthM L2:DU:Trig3CoarseDelayM                  / L2:DU:Trig3CoarseDelayM L2:DU:Trig3DelayM                        / L2:DU:Trig3DelayM L2:DU:Trig3FineDelayM                    / L2:DU:Trig3FineDelayM L2:DU:Trig3GateM                         / L2:DU:Trig3GateM L2:DU:Trig3MaskM                         / L2:DU:Trig3MaskM L2:DU:Trig3WidthM                        / L2:DU:Trig3WidthM L2:DU:Trig4CoarseDelayM                  / L2:DU:Trig4CoarseDelayM L2:DU:Trig4DelayM                        / L2:DU:Trig4DelayM L2:DU:Trig4FineDelayM                    / L2:DU:Trig4FineDelayM L2:DU:Trig4GateM                         / L2:DU:Trig4GateM L2:DU:Trig4MaskM                         / L2:DU:Trig4MaskM L2:DU:Trig4WidthM                        / L2:DU:Trig4WidthM L2:P:TrigCoarseDelayM                    / L2:P:TrigCoarseDelayM L2:P:TrigDelayM                          / L2:P:TrigDelayM L2:P:TrigFineDelayM                      / L2:P:TrigFineDelayM L2:P:TrigGateM                           / L2:P:TrigGateM L2:P:TrigMaskM                           / L2:P:TrigMaskM L2:P:TrigWidthM                          / L2:P:TrigWidthM L2:TM:BPMTrigTimeMonCC                   / L2:TM:BPMTrigTimeMonCC L2:TM:DAGateStartMonCC                   / L2:TM:DAGateStartMonCC L2:TM:DAGateWidthMonCC                   / L2:TM:DAGateWidthMonCC L2:TM:elDmuTrig1MonCC                    / L2:TM:elDmuTrig1MonCC L2:TM:elDmuTrig2MonCC                    / L2:TM:elDmuTrig2MonCC L2:TM:elDmuTrig3MonCC                    / L2:TM:elDmuTrig3MonCC L2:TM:elDmuTrig4MonCC                    / L2:TM:elDmuTrig4MonCC L2:TM:hiPwrRfOnLinkAI                    / L2:TM:hiPwrRfOnLinkAI L2:TM:llrfGateStartMonCC                 / L2:TM:llrfGateStartMonCC L2:TM:llrfGateWidthMonCC                 / L2:TM:llrfGateWidthMonCC L2:TM:modTrigMonCC                       / L2:TM:modTrigMonCC L2:TM:sledTrigMonCC                      / L2:TM:sledTrigMonCC L2:TM:slideRfTimingAmtAI                 / L2:TM:slideRfTimingAmtAI L3-TM:EVF1:Lnk1StatusM                   / L3-TM:EVF1:Lnk1StatusM L3-TM:EVF1:Lnk2StatusM                   / L3-TM:EVF1:Lnk2StatusM L3-TM:EVF1:Lnk3StatusM                   / L3-TM:EVF1:Lnk3StatusM L3-TM:EVF1:Lnk4StatusM                   / L3-TM:EVF1:Lnk4StatusM L3-TM:EVF1:Lnk5StatusM                   / L3-TM:EVF1:Lnk5StatusM L3-TM:EVF1:Lnk6StatusM                   / L3-TM:EVF1:Lnk6StatusM L3-TM:EVF1:Lnk7StatusM                   / L3-TM:EVF1:Lnk7StatusM L3-TM:EVF1:Lnk8StatusM                   / L3-TM:EVF1:Lnk8StatusM L3-TM:EVF1:Lnk9StatusM                   / L3-TM:EVF1:Lnk9StatusM L3-TM:EVF1:Lnk10StatusM                  / L3-TM:EVF1:Lnk10StatusM L3-TM:EVF1:Lnk11StatusM                  / L3-TM:EVF1:Lnk11StatusM L3-TM:EVF1:Lnk12StatusM                  / L3-TM:EVF1:Lnk12StatusM L3-TM:EVM1-EvtClk:Pll-Sts                / L3-TM:EVM1-EvtClk:Pll-Sts L3-TM:EVM1-FCT:Link-Sts_                 / L3-TM:EVM1-FCT:Link-Sts_ L3-TM:EVM1-FCT:Link:1-Sts                / L3-TM:EVM1-FCT:Link:1-Sts L3-TM:EVM1-FCT:Link:2-Sts                / L3-TM:EVM1-FCT:Link:2-Sts L3-TM:EVM1-FCT:Link:3-Sts                / L3-TM:EVM1-FCT:Link:3-Sts L3-TM:EVM1-FCT:Link:4-Sts                / L3-TM:EVM1-FCT:Link:4-Sts L3-TM:EVM1-FCT:Link:5-Sts                / L3-TM:EVM1-FCT:Link:5-Sts L3-TM:EVM1-FCT:Link:6-Sts                / L3-TM:EVM1-FCT:Link:6-Sts L3-TM:EVM1-FCT:Link:7-Sts                / L3-TM:EVM1-FCT:Link:7-Sts L3-TM:EVM1-FCT:Link:8-Sts                / L3-TM:EVM1-FCT:Link:8-Sts L3-TM:EVM1-FCT:Msrd:TotalM               / L3-TM:EVM1-FCT:Msrd:TotalM L3-TM:EVM1-Seq0:Enable-Sts               / L3-TM:EVM1-Seq0:Enable-Sts L3-TM:EVM1-Seq1:Enable-Sts               / L3-TM:EVM1-Seq1:Enable-Sts L3-TM:EVR1-DC:Lck-Sts                    / L3-TM:EVR1-DC:Lck-Sts L3-TM:EVR1-DC:LckDat-Sts                 / L3-TM:EVR1-DC:LckDat-Sts L3-TM:EVR1-DC:LckTrk-Sts                 / L3-TM:EVR1-DC:LckTrk-Sts L3-TM:EVR1-Out:Int:State-Sts             / L3-TM:EVR1-Out:Int:State-Sts L3-TM:EVR1:Link-Sts                      / L3-TM:EVR1:Link-Sts L3-TM:EVR1:Pll-Sts                       / L3-TM:EVR1:Pll-Sts L3-TM:EVR1:Time:Valid-Sts                / L3-TM:EVR1:Time:Valid-Sts L3-TM:EVR2-DC:Lck-Sts                    / L3-TM:EVR2-DC:Lck-Sts L3-TM:EVR2-DC:LckDat-Sts                 / L3-TM:EVR2-DC:LckDat-Sts L3-TM:EVR2-DC:LckTrk-Sts                 / L3-TM:EVR2-DC:LckTrk-Sts L3-TM:EVR2-Out:Int:State-Sts             / L3-TM:EVR2-Out:Int:State-Sts L3-TM:EVR2:Link-Sts                      / L3-TM:EVR2:Link-Sts L3-TM:EVR2:Pll-Sts                       / L3-TM:EVR2:Pll-Sts L3-TM:EVR2:Time:Valid-Sts                / L3-TM:EVR2:Time:Valid-Sts L3-TM:EVR3-DC:Lck-Sts                    / L3-TM:EVR3-DC:Lck-Sts L3-TM:EVR3-DC:LckDat-Sts                 / L3-TM:EVR3-DC:LckDat-Sts L3-TM:EVR3-DC:LckTrk-Sts                 / L3-TM:EVR3-DC:LckTrk-Sts L3-TM:EVR3-Out:Int:State-Sts             / L3-TM:EVR3-Out:Int:State-Sts L3-TM:EVR3:Link-Sts                      / L3-TM:EVR3:Link-Sts L3-TM:EVR3:Pll-Sts                       / L3-TM:EVR3:Pll-Sts L3-TM:EVR3:Time:Valid-Sts                / L3-TM:EVR3:Time:Valid-Sts L3-TM:EVR4-DC:Lck-Sts                    / L3-TM:EVR4-DC:Lck-Sts L3-TM:EVR4-DC:LckDat-Sts                 / L3-TM:EVR4-DC:LckDat-Sts L3-TM:EVR4-DC:LckTrk-Sts                 / L3-TM:EVR4-DC:LckTrk-Sts L3-TM:EVR4-Out:Int:State-Sts             / L3-TM:EVR4-Out:Int:State-Sts L3-TM:EVR4:Link-Sts                      / L3-TM:EVR4:Link-Sts L3-TM:EVR4:Pll-Sts                       / L3-TM:EVR4:Pll-Sts L3-TM:EVR4:Time:Valid-Sts                / L3-TM:EVR4:Time:Valid-Sts L3-TM:EVR5-DC:Lck-Sts                    / L3-TM:EVR5-DC:Lck-Sts L3-TM:EVR5-DC:LckDat-Sts                 / L3-TM:EVR5-DC:LckDat-Sts L3-TM:EVR5-DC:LckTrk-Sts                 / L3-TM:EVR5-DC:LckTrk-Sts L3-TM:EVR5-Out:Int:State-Sts             / L3-TM:EVR5-Out:Int:State-Sts L3-TM:EVR5:Link-Sts                      / L3-TM:EVR5:Link-Sts L3-TM:EVR5:Pll-Sts                       / L3-TM:EVR5:Pll-Sts L3-TM:EVR5:Time:Valid-Sts                / L3-TM:EVR5:Time:Valid-Sts L3-TM:EVR6-DC:Lck-Sts                    / L3-TM:EVR6-DC:Lck-Sts L3-TM:EVR6-DC:LckDat-Sts                 / L3-TM:EVR6-DC:LckDat-Sts L3-TM:EVR6-DC:LckTrk-Sts                 / L3-TM:EVR6-DC:LckTrk-Sts L3-TM:EVR6-Out:Int:State-Sts             / L3-TM:EVR6-Out:Int:State-Sts L3-TM:EVR6:Link-Sts                      / L3-TM:EVR6:Link-Sts L3-TM:EVR6:Pll-Sts                       / L3-TM:EVR6:Pll-Sts L3-TM:EVR6:Time:Valid-Sts                / L3-TM:EVR6:Time:Valid-Sts L3:CTR:TrigCoarseDelayM                  / L3:CTR:TrigCoarseDelayM L3:CTR:TrigDelayM                        / L3:CTR:TrigDelayM L3:CTR:TrigFineDelayM                    / L3:CTR:TrigFineDelayM L3:CTR:TrigGateM                         / L3:CTR:TrigGateM L3:CTR:TrigMaskM                         / L3:CTR:TrigMaskM L3:CTR:TrigWidthM                        / L3:CTR:TrigWidthM L3:DU:Trig1CoarseDelayM                  / L3:DU:Trig1CoarseDelayM L3:DU:Trig1DelayM                        / L3:DU:Trig1DelayM L3:DU:Trig1FineDelayM                    / L3:DU:Trig1FineDelayM L3:DU:Trig1GateM                         / L3:DU:Trig1GateM L3:DU:Trig1MaskM                         / L3:DU:Trig1MaskM L3:DU:Trig1WidthM                        / L3:DU:Trig1WidthM L3:DU:Trig2CoarseDelayM                  / L3:DU:Trig2CoarseDelayM L3:DU:Trig2DelayM                        / L3:DU:Trig2DelayM L3:DU:Trig2FineDelayM                    / L3:DU:Trig2FineDelayM L3:DU:Trig2GateM                         / L3:DU:Trig2GateM L3:DU:Trig2MaskM                         / L3:DU:Trig2MaskM L3:DU:Trig2WidthM                        / L3:DU:Trig2WidthM L3:DU:Trig3CoarseDelayM                  / L3:DU:Trig3CoarseDelayM L3:DU:Trig3DelayM                        / L3:DU:Trig3DelayM L3:DU:Trig3FineDelayM                    / L3:DU:Trig3FineDelayM L3:DU:Trig3GateM                         / L3:DU:Trig3GateM L3:DU:Trig3MaskM                         / L3:DU:Trig3MaskM L3:DU:Trig3WidthM                        / L3:DU:Trig3WidthM L3:DU1:TM:4:sourceM                      / L3:DU1:TM:4:sourceM L3:DU1:Trig4CoarseDelayM                 / L3:DU1:Trig4CoarseDelayM L3:DU1:Trig4DelayM                       / L3:DU1:Trig4DelayM L3:DU1:Trig4FineDelayM                   / L3:DU1:Trig4FineDelayM L3:DU1:Trig4GateM                        / L3:DU1:Trig4GateM L3:DU1:Trig4MaskM                        / L3:DU1:Trig4MaskM L3:DU1:Trig4WidthM                       / L3:DU1:Trig4WidthM L3:P:TrigCoarseDelayM                    / L3:P:TrigCoarseDelayM L3:P:TrigDelayM                          / L3:P:TrigDelayM L3:P:TrigFineDelayM                      / L3:P:TrigFineDelayM L3:P:TrigGateM                           / L3:P:TrigGateM L3:P:TrigMaskM                           / L3:P:TrigMaskM L3:P:TrigWidthM                          / L3:P:TrigWidthM L3:TM:BPMTrigTimeMonCC                   / L3:TM:BPMTrigTimeMonCC L3:TM:CTRTimeMonCC                       / L3:TM:CTRTimeMonCC L3:TM:DAGateStartMonCC                   / L3:TM:DAGateStartMonCC L3:TM:DAGateWidthMonCC                   / L3:TM:DAGateWidthMonCC L3:TM:VideoPreTrigTimeMonCC              / L3:TM:VideoPreTrigTimeMonCC L3:TM:elDmuTrig1MonCC                    / L3:TM:elDmuTrig1MonCC L3:TM:elDmuTrig2MonCC                    / L3:TM:elDmuTrig2MonCC L3:TM:elDmuTrig3MonCC                    / L3:TM:elDmuTrig3MonCC L3:TM:elDmu1Trig4MonCC                   / L3:TM:elDmu1Trig4MonCC L3:TM:hiPwrRfOnLinkAI                    / L3:TM:hiPwrRfOnLinkAI L3:TM:llrfGateStartMonCC                 / L3:TM:llrfGateStartMonCC L3:TM:llrfGateWidthMonCC                 / L3:TM:llrfGateWidthMonCC L3:TM:llrfSelectedGateStartM             / L3:TM:llrfSelectedGateStartM L3:TM:llrfSelectedGateWidthM             / L3:TM:llrfSelectedGateWidthM L3:TM:modTrigMonCC                       / L3:TM:modTrigMonCC L3:TM:sledTrigMonCC                      / L3:TM:sledTrigMonCC L3:TM:slideRfTimingAmtAI                 / L3:TM:slideRfTimingAmtAI L4:DU:Trig1CoarseDelayM                  / L4:DU:Trig1CoarseDelayM L4:DU:Trig1DelayM                        / L4:DU:Trig1DelayM L4:DU:Trig1FineDelayM                    / L4:DU:Trig1FineDelayM L4:DU:Trig1GateM                         / L4:DU:Trig1GateM L4:DU:Trig1MaskM                         / L4:DU:Trig1MaskM L4:DU:Trig1WidthM                        / L4:DU:Trig1WidthM L4:DU:Trig2CoarseDelayM                  / L4:DU:Trig2CoarseDelayM L4:DU:Trig2DelayM                        / L4:DU:Trig2DelayM L4:DU:Trig2FineDelayM                    / L4:DU:Trig2FineDelayM L4:DU:Trig2GateM                         / L4:DU:Trig2GateM L4:DU:Trig2MaskM                         / L4:DU:Trig2MaskM L4:DU:Trig2WidthM                        / L4:DU:Trig2WidthM L4:DU:Trig3CoarseDelayM                  / L4:DU:Trig3CoarseDelayM L4:DU:Trig3DelayM                        / L4:DU:Trig3DelayM L4:DU:Trig3FineDelayM                    / L4:DU:Trig3FineDelayM L4:DU:Trig3GateM                         / L4:DU:Trig3GateM L4:DU:Trig3MaskM                         / L4:DU:Trig3MaskM L4:DU:Trig3WidthM                        / L4:DU:Trig3WidthM L4:DU:Trig4CoarseDelayM                  / L4:DU:Trig4CoarseDelayM L4:DU:Trig4DelayM                        / L4:DU:Trig4DelayM L4:DU:Trig4FineDelayM                    / L4:DU:Trig4FineDelayM L4:DU:Trig4GateM                         / L4:DU:Trig4GateM L4:DU:Trig4MaskM                         / L4:DU:Trig4MaskM L4:DU:Trig4WidthM                        / L4:DU:Trig4WidthM L4:P:TrigCoarseDelayM                    / L4:P:TrigCoarseDelayM L4:P:TrigDelayM                          / L4:P:TrigDelayM L4:P:TrigFineDelayM                      / L4:P:TrigFineDelayM L4:P:TrigGateM                           / L4:P:TrigGateM L4:P:TrigMaskM                           / L4:P:TrigMaskM L4:P:TrigWidthM                          / L4:P:TrigWidthM L4:TM:BPMTrigTimeMonCC                   / L4:TM:BPMTrigTimeMonCC L4:TM:DAGateStartMonCC                   / L4:TM:DAGateStartMonCC L4:TM:DAGateWidthMonCC                   / L4:TM:DAGateWidthMonCC L4:TM:elDmuTrig1MonCC                    / L4:TM:elDmuTrig1MonCC L4:TM:elDmuTrig2MonCC                    / L4:TM:elDmuTrig2MonCC L4:TM:elDmuTrig3MonCC                    / L4:TM:elDmuTrig3MonCC L4:TM:elDmuTrig4MonCC                    / L4:TM:elDmuTrig4MonCC L4:TM:hiPwrRfOnLinkAI                    / L4:TM:hiPwrRfOnLinkAI L4:TM:llrfGateStartMonCC                 / L4:TM:llrfGateStartMonCC L4:TM:llrfGateWidthMonCC                 / L4:TM:llrfGateWidthMonCC L4:TM:modTrigMonCC                       / L4:TM:modTrigMonCC L4:TM:sledTrigMonCC                      / L4:TM:sledTrigMonCC L4:TM:slideRfTimingAmtAI                 / L4:TM:slideRfTimingAmtAI L5:DU:Trig1CoarseDelayM                  / L5:DU:Trig1CoarseDelayM L5:DU:Trig1DelayM                        / L5:DU:Trig1DelayM L5:DU:Trig1FineDelayM                    / L5:DU:Trig1FineDelayM L5:DU:Trig1GateM                         / L5:DU:Trig1GateM L5:DU:Trig1MaskM                         / L5:DU:Trig1MaskM L5:DU:Trig1WidthM                        / L5:DU:Trig1WidthM L5:DU:Trig2CoarseDelayM                  / L5:DU:Trig2CoarseDelayM L5:DU:Trig2DelayM                        / L5:DU:Trig2DelayM L5:DU:Trig2FineDelayM                    / L5:DU:Trig2FineDelayM L5:DU:Trig2GateM                         / L5:DU:Trig2GateM L5:DU:Trig2MaskM                         / L5:DU:Trig2MaskM L5:DU:Trig2WidthM                        / L5:DU:Trig2WidthM L5:DU:Trig3CoarseDelayM                  / L5:DU:Trig3CoarseDelayM L5:DU:Trig3DelayM                        / L5:DU:Trig3DelayM L5:DU:Trig3FineDelayM                    / L5:DU:Trig3FineDelayM L5:DU:Trig3GateM                         / L5:DU:Trig3GateM L5:DU:Trig3MaskM                         / L5:DU:Trig3MaskM L5:DU:Trig3WidthM                        / L5:DU:Trig3WidthM L5:DU:Trig4CoarseDelayM                  / L5:DU:Trig4CoarseDelayM L5:DU:Trig4DelayM                        / L5:DU:Trig4DelayM L5:DU:Trig4FineDelayM                    / L5:DU:Trig4FineDelayM L5:DU:Trig4GateM                         / L5:DU:Trig4GateM L5:DU:Trig4MaskM                         / L5:DU:Trig4MaskM L5:DU:Trig4WidthM                        / L5:DU:Trig4WidthM L5:DU2:TM:4:sourceM                      / L5:DU2:TM:4:sourceM L5:DU2:Trig4CoarseDelayM                 / L5:DU2:Trig4CoarseDelayM L5:DU2:Trig4DelayM                       / L5:DU2:Trig4DelayM L5:DU2:Trig4FineDelayM                   / L5:DU2:Trig4FineDelayM L5:DU2:Trig4GateM                        / L5:DU2:Trig4GateM L5:DU2:Trig4MaskM                        / L5:DU2:Trig4MaskM L5:DU2:Trig4WidthM                       / L5:DU2:Trig4WidthM L5:P:TrigCoarseDelayM                    / L5:P:TrigCoarseDelayM L5:P:TrigDelayM                          / L5:P:TrigDelayM L5:P:TrigFineDelayM                      / L5:P:TrigFineDelayM L5:P:TrigGateM                           / L5:P:TrigGateM L5:P:TrigMaskM                           / L5:P:TrigMaskM L5:P:TrigWidthM                          / L5:P:TrigWidthM L5:TM:BPMTrigTimeMonCC                   / L5:TM:BPMTrigTimeMonCC L5:TM:DAGateStartMonCC                   / L5:TM:DAGateStartMonCC L5:TM:DAGateWidthMonCC                   / L5:TM:DAGateWidthMonCC L5:TM:elDmuTrig1MonCC                    / L5:TM:elDmuTrig1MonCC L5:TM:elDmuTrig2MonCC                    / L5:TM:elDmuTrig2MonCC L5:TM:elDmuTrig3MonCC                    / L5:TM:elDmuTrig3MonCC L5:TM:elDmuTrig4MonCC                    / L5:TM:elDmuTrig4MonCC L5:TM:elDmu2Trig4MonCC                   / L5:TM:elDmu2Trig4MonCC L5:TM:hiPwrRfOnLinkAI                    / L5:TM:hiPwrRfOnLinkAI L5:TM:llrfGateStartMonCC                 / L5:TM:llrfGateStartMonCC L5:TM:llrfGateWidthMonCC                 / L5:TM:llrfGateWidthMonCC L5:TM:modTrigMonCC                       / L5:TM:modTrigMonCC L5:TM:sledTrigMonCC                      / L5:TM:sledTrigMonCC L5:TM:slideRfTimingAmtAI                 / L5:TM:slideRfTimingAmtAI L6-TM:EVR1-DC:Lck-Sts                    / L6-TM:EVR1-DC:Lck-Sts L6-TM:EVR1-DC:LckDat-Sts                 / L6-TM:EVR1-DC:LckDat-Sts L6-TM:EVR1-DC:LckTrk-Sts                 / L6-TM:EVR1-DC:LckTrk-Sts L6-TM:EVR1-Out:Int:State-Sts             / L6-TM:EVR1-Out:Int:State-Sts L6-TM:EVR1:Link-Sts                      / L6-TM:EVR1:Link-Sts L6-TM:EVR1:Pll-Sts                       / L6-TM:EVR1:Pll-Sts L6-TM:EVR1:Time:Valid-Sts                / L6-TM:EVR1:Time:Valid-Sts L6:ScreenRoomTrigCoarseDelayM            / L6:ScreenRoomTrigCoarseDelayM L6:ScreenRoomTrigDelayM                  / L6:ScreenRoomTrigDelayM L6:ScreenRoomTrigFineDelayM              / L6:ScreenRoomTrigFineDelayM L6:ScreenRoomTrigGateM                   / L6:ScreenRoomTrigGateM L6:ScreenRoomTrigMaskM                   / L6:ScreenRoomTrigMaskM L6:ScreenRoomTrigWidthM                  / L6:ScreenRoomTrigWidthM L6:TM:DAGateStartMonCC                   / L6:TM:DAGateStartMonCC L6:TM:DAGateWidthMonCC                   / L6:TM:DAGateWidthMonCC L6:TM:SCRMTimeMonCC                      / L6:TM:SCRMTimeMonCC L6:TM:hiPwrRfOnLinkAI                    / L6:TM:hiPwrRfOnLinkAI L6:TM:llrfGateStartMonCC                 / L6:TM:llrfGateStartMonCC L6:TM:llrfGateWidthMonCC                 / L6:TM:llrfGateWidthMonCC L6:TM:modTrigMonCC                       / L6:TM:modTrigMonCC L6:TM:sledTrigMonCC                      / L6:TM:sledTrigMonCC L6:TM:slideRfTimingAmtAI                 / L6:TM:slideRfTimingAmtAI

Date/Time Range of Interest
	Year	Month	Day	Hour
Starting date/time:	2025 2024 2023 2022 2021 2020 2019 2018 2017 2016 2015 2014 2013 2012 2011 2010 2009 2008 2007 2006 2005 2004 2003 2002 2001 2000	1 2 3 4 5 6 7 8 9 10 11 12	1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31	0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23
Ending date/time:	2025 2024 2023 2022 2021 2020 2019 2018 2017 2016 2015 2014 2013 2012 2011 2010 2009 2008 2007 2006 2005 2004 2003 2002 2001 2000	1 2 3 4 5 6 7 8 9 10 11 12	1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31	1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24

Plot Options
Size:	Normal PDA Size Tiny Small Medium Large
Background Color:	White Black
Layout:	1x1 1x2 2x1 2x2 3x3 4x4 5x5
Label size:	Normal +15% +30% +45% +60%
Sparsing:	None 2 4 8 16 32 64 128
Miscellaneous:	With Beam Current Same Y scales Y offset mode Separate Option override
Extra Options:

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